Address detector of a redundancy memory cell

Details Address detector of a redundancy memory cell Address detector of a redundancy memory cell

1990-11-16

1993-08-03

Popek, Joseph A.

Static information storage and retrieval

Addressing

Including particular address buffer or latch circuit...

365200, 365201, 3652257, G11C 700, G11C 2900

Patent

active

052335666

ABSTRACT:
An address detector of a redundancy memory cell is provided including a programming element for storing address data for replacing a defective cell with the redundancy cell. In a test mode, the redundancy cell may be written to regardless of whether or not a memory cell is defective. Thus, the redundancy cell may be tested without programming a programming element that replaces a defective cell with a redundancy cell. The detector further includes a latch for latching the state of the programming element, and a data setting element for setting the latch in a test mode.

REFERENCES:
patent: 4648075 (1987-03-01), Segawa et al.
patent: 4860260 (1989-08-01), Saito et al.

Affiliated with

Also associated with

Rating

Address detector of a redundancy memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Address detector of a redundancy memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Address detector of a redundancy memory cell will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2277224