4. Static information storage and retrieval
  5. Magnetic bubbles
  6. Guide structure

Oscar Frederick Jones, Jr.

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Automatic delay technique for early read and write...

Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate

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Cached synchronous DRAM architecture having a mode register...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate

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Clock controlled power-down state

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit
Reexamination Certificate

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Data inversion register technique for integrated circuit...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Dual access DRAM

Static information storage and retrieval – Read/write circuit – Simultaneous operations
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Profile ID: LFUS-PAI-P-1725396

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