Michael Putrino

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Apparatus and method for prediction of zero arithmetic/logic res

Boots – shoes – and leggings
Patent

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Apparatus for branch prediction for computer instructions

Boots – shoes – and leggings
Patent

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Arithmetic unit for performing XY+B operation

Boots – shoes – and leggings
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High performance parallel binary byte adder

Boots – shoes – and leggings
Patent

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Instruction dispatch queue for improved instruction cache to que

Chain – staple – and horseshoe making
Patent

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Profile ID: LFUS-PAI-P-218529

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