4. Static information storage and retrieval
  5. Interconnection arrangements

Michael A. Killian

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Edge pad architecture for semiconductor memory

Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate

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Fuse latch circuit with non-disruptive re-interrogation

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Fusible link or intentional destruct circuit
Reexamination Certificate

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Isolated well ESD device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
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Pre-charge circuit and method for memory devices with shared...

Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate

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Test mode for IPP current measurement for wordline defect...

Static information storage and retrieval – Read/write circuit – Testing
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Profile ID: LFUS-PAI-P-2423584

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