Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
Corporate Assignee
active
No affiliations
Analog-to digital conversion device having a standby mode
Clock recovery circuit with matched oscillators
Comparator of phase between a digital signal and a clock signal,
Device for interfacing logic signals from the LLL level to the T
ECL level/CMOS level logic signal interfacing device
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Profile ID: LFUS-PAI-P-166691