Comparator of phase between a digital signal and a clock signal,

Details Comparator of phase between a digital signal and a clock signal, Comparator of phase between a digital signal and a clock signal,

1995-12-06

1997-02-11

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 27, 331 57, 327 12, H03D 1300, H03L 7085

Patent

active

056025122

ABSTRACT:
A comparator of phase between a digital signal and a clock signal adapted for the construction of a phase locked loop in integrated circuit form, that includes a first channel formed by a flip-flop and an exclusive OR gate, and a second channel formed by a second exclusive OR gate and a delay circuit whose delay is set to half the period of the clock signal. The first channel receives the digital signal and the clock signal and delivers a first detection signal of transition of the digital signal. The second channel receives only the digital signal and delivers a second detection signal of transition of the digital signal.

REFERENCES:
patent: 4535459 (1985-08-01), Hogge, Jr.
patent: 5053649 (1991-10-01), Johnson
patent: 5115208 (1992-05-01), Masdea et al.
Journal of Lightwave Technology, vol. 3, No. 6, Dec. 1985, New York, USA pp. 1312-1314, Charles R. Hogge, Jr. "A Self Correction Clock Recovery Circuit".

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