Larry Edward Thatcher

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Apparatus and method for processing multiple cache misses to a s

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Data processing system and method of operation having input/outp

Patent

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Data processing system including load/store unit having a...

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate

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Determining successful completion of an instruction by...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
Reexamination Certificate

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Dynamic expansion of execution pipeline stages

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Patent

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Profile ID: LFUS-PAI-P-983282

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