Kenneth Lundy Ward

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Fault tolerant time synchronization mechanism in a scaleable...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
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Method and apparatus for equalizing grants of a data bus to prim

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Method and apparatus for fault tolerant time synchronization...

Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses – Using delay
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Method and apparatus for frequency independent processor...

Electrical computers and digital processing systems: support – Computer power control – Power conservation
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Method and apparatus for reducing number of cycles required...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Profile ID: LFUS-PAI-P-1371773

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