4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Kenneth J. Reyer

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ABIST data compression and serialization for memory built-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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ABIST data compression and serialization for memory built-in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Apparatus and method for implementing multiple memory...

Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate

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Clock control method and apparatus for a memory array

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
Reexamination Certificate

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Fast pulse powered NOR decode apparatus for semiconductor...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Decoding
Reexamination Certificate

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