4. Electricity: electrical systems and devices
  5. Safety and protection of systems and devices
  6. Load shunting by fault responsive means

Jeremy C. Smith

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Circuit and method for reducing parasitic bipolar effects...

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Self-aligned
Reexamination Certificate

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Circuit and method for reducing parasitic bipolar effects...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate

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Circuit for electrostatic discharge (ESD) protection

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent

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Circuit for electrostatic discharge (ESD) protection

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Patent

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Circuit method for reducing parasitic bipolar effects during...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate

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Profile ID: LFUS-PAI-P-284408

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