Circuit for electrostatic discharge (ESD) protection

Details Circuit for electrostatic discharge (ESD) protection Circuit for electrostatic discharge (ESD) protection

1997-09-29

1999-05-11

Leja, Ronald W.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361111, H02H9/00

Patent

active

059034190

ABSTRACT:
An electrostatic discharge (ESD) circuit (12) provides robust protection to an input/output driver circuit (10). The discharge path is provided by a parasitic bipolar transistor (202). The parasitic bipolar device is triggered by a combination of a MOSFET (204) and a string of diodes (200). The trigger point of the MOSFET is programmable by varying the number of individual diodes in the string of diodes. A feedback circuit (602) ensures that MOSFET (204) is in a conductive state independent of the voltage state of the voltage supply, VDD, during an ESD event.

REFERENCES:
patent: 5311391 (1994-05-01), Dungan et al.
patent: 5500546 (1996-03-01), Marum et al.
patent: 5530612 (1996-06-01), Maloney
patent: 5539327 (1996-07-01), Shigehara et al.
Naresh Tandan, "ESD Trigger Circuit", EOS/ESD Symposium, Section 3.3.1-3.3.5 (1994). No Month.
Voldman, et al., "Analysis of Snubber-Clamped Diode-String Mixed Voltage Interface ESD Protection Network for Advanced Microprocessors", EOS/ESD Symposium, pp. 43-61 (1995). No Month.
Amerasekera, et al., "Substrate Triggering and Salicide Effects on ESD Performance and Protection Circuit Design in Deep Submicron CMOS Processes", IEDM, pp. 547-550 (1995). No Month.
Ramaswamy, et al., "EOS/ESD Analysis of High-Density Logic Chips", EOS/ESD Symposium, pp. 285-290 (1996).

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