4. Electrical computers and digital processing systems: processing
  5. Processing control

Jaume Abella

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Cache sharing based thread control

Electrical computers and digital processing systems: processing – Processing control
Reexamination Certificate

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Correcting intermittent errors in data storage structures

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Enhancing reliability of a many-core processor

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Memory content inverting to minimize NTBI effects

Static information storage and retrieval – Systems using particular element – Flip-flop
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NBTI-resilient memory cells with NAND gates

Static information storage and retrieval – Read only systems – Semiconductive
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Profile ID: LFUS-PAI-P-2202018

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