Correcting intermittent errors in data storage structures

Details Correcting intermittent errors in data storage structures Correcting intermittent errors in data storage structures

2007-08-03

2010-06-29

Tu, Christine T (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S722000, C714S819000, C714S054000, C365S200000, C365S201000

Reexamination Certificate

active

07747913

ABSTRACT:
Embodiments of apparatuses and methods for correcting intermittent errors in data storage structures are disclosed. In one embodiment, an apparatus includes a data storage location, error detection logic, inverting logic, control logic, operating logic, and evaluation logic. The error detection logic is to detect an error in a data value read from the data storage location. The inverting logic is to invert the erroneous data value to produce an inverted erroneous data value. The control logic is to cause the inverted erroneous data value to be stored in the data storage location and subsequently read from the data storage location to produce an operand value. The operating logic is to perform a logical operation using the erroneous data value and the operand value. The evaluation logic is to evaluate the result to determine if the error is a soft error.

REFERENCES:
patent: 4319357 (1982-03-01), Bossen
patent: 6799291 (2004-09-01), Kilmer et al.
patent: 7468923 (2008-12-01), Ishimaru

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