4. Semiconductor device manufacturing: process
  5. Formation of electrically isolated lateral semiconductive...
  6. Grooved and refilled with deposited dielectric material

Huang Liu

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Integrated circuit having ultralow-K dielectric layer

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Interconnect capping layer and method of fabrication

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Intermetal dielectric layer for integrated circuits

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
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Intermetal dielectric layer for integrated circuits

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
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Method for reducing silicide defects in integrated circuits

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
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Profile ID: LFUS-PAI-P-2027009

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