Method for reducing silicide defects in integrated circuits

Details Method for reducing silicide defects in integrated circuits Method for reducing silicide defects in integrated circuits

2008-05-21

2010-06-29

Mandala, Victor A (Department: 2826)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C257SE29139, C257SE29161, C257SE21199, C257S384000, C438S664000, C438S655000, C438S656000

Reexamination Certificate

active

07745320

ABSTRACT:
A method for forming silicide contacts in integrated circuits (ICs) is described. A spacer pull-back etch is performed during the salicidation process to reduce the stress between the spacer and source/drain silicide contact at the spacer undercut. This prevents the propagation of surface defects into the substrate, thereby minimizing the occurrence of silicide pipe defects. The spacer pull-back etch can be performed after a first annealing step to form the silicide contacts.

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