Oscillators
Automatic frequency stabilization using a phase or frequency...
Afc with logic elements
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Dynamic process for the generation of biased pseudo-random test
Minimizing path delay in a machine by compensation of timing thr
Monolithic digital phaselock loop circuit having an expanded pul
Semiconductor device comprising a layered structure grown on a s
Variable self-correcting digital delay circuit
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Profile ID: LFUS-PAI-P-734519