Variable self-correcting digital delay circuit

Details Variable self-correcting digital delay circuit Variable self-correcting digital delay circuit

1992-03-12

1993-08-17

Callahan, Timothy P.

Electrical transmission or interconnection systems

With nonswitching means responsive to external nonelectrical...

Temperature responsive

307591, 307269, 307602, 328 55, 328 63, H03K 513, H03K 5159

Patent

active

052372243

ABSTRACT:
A variable self-correcting on-chip circuit comprised of a plurality of digital circuit components is described, whereby electrical signals are precisely positioned with respect to one another. Electrical signals are converted into a number of pulses within a predefined time window. A first number of pulses obtained from free on-chip circuit oscillation is compared to a second number of pulses derived from a predetermined delay defined by the user. An unequal comparison generates control signals capable of advancing or retarding electrical signals. The delay adjustments account for technology, process, temperature and power supply variations. The compounded effect of these variations translates into a certain delay for which self-correction takes effect.

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IBM Technical Disclosure Bulletin, vol. 30, No. 2, Jul. 1987, J. H. Chang et al. "Scheme for Reducing Clock Skew in Multiple-Chip System Design".

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