4. Semiconductor device manufacturing: process
  5. Coating with electrically or thermally conductive material
  6. To form ohmic contact to semiconductive material

Charles Brantley

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Cell plate regulator

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent

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Circuit and method for configuring a redundant bond pad for prob

Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Patent

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Circuit and method to prevent inadvertent test mode entry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Circuit and method to prevent inadvertent test mode entry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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CMOS buffer having stable threshold voltage

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Patent

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Profile ID: LFUS-PAI-P-207076

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