Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-08-31
2000-12-05
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438336, H01L 218242
Patent
active
061566047
ABSTRACT:
A circuit and method for a memory cell with a vertical transistor and a trench capacitor. The cell includes an access transistor that is formed in a pillar of a single crystal semiconductor material. The transistor has vertically aligned first and second source/drain regions and a body region. The transistor also includes a gate that is formed along a side of the pillar. A trench capacitor is also included in the cell. A first plate of the trench capacitor is formed integral with the first source/drain region. A second plate is disposed adjacent to the first plate and separated from the first plate by a gate oxide.
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Forbes Leonard
Noble Wendell P.
Bowers Charles
Micro)n Technology, Inc.
Thompson Craig
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