Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-03-27
1998-03-17
Dutton, Brian
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438316, H01L 218238, H01L 21331, H01L 218222
Patent
active
057286132
ABSTRACT:
A process has been developed in which narrow base width, lateral bipolar junction transistors, and narrow channel length MOSFET devices, can be simultaneously fabricated, in a silicon on insulator layer. The narrow base width is defined by the width of an insulator sidewall spacer, formed on the sides of a polysilicon gate structure. The narrow base width, resulting in increased transistor gain and switching speed, along with reductions in parasitic capacitances, due to placing devices in a silicon on insulator layer, result in enhanced device performance.
REFERENCES:
patent: 4997782 (1991-03-01), Bergonzoni
patent: 5258318 (1993-11-01), Buti et al.
patent: 5610087 (1997-03-01), Hsu et al.
Chung Steve S.
Hsu Ching-Hsiang
Liang Mong-Song
Wong Shyh-Chyi
Ackerman Stephen B.
Dutton Brian
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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