Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-05-28
1999-12-14
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438598, 438599, 438618, 438253, H01L 218242
Patent
active
060016833
ABSTRACT:
A method of forming an interconnection by using a landing pad is disclosed. In a semiconductor device having a memory cell portion and a peripheral circuit portion, a refractory metal is used for the bitline instead of the usual polycide, to concurrently form a contact on each active region of an N-type and a P-type, then a landing pad is formed on the peripheral circuit portion when a bitline is formed on the memory cell portion. In such a process, a substantial contact hole for the interconnection is formed on the landing pad so that an aspect ratio of the contact can be lowered. Accordingly, when forming a metal interconnection, the contact hole for the interconnection is easily filled by Al reflow so that the coverage-step of the metal being depositing in the contact hole for the interconnection is enhanced, the contact resistance is reduced. Further, the reliability of the semiconductor device is improved.
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Gurley Lynne A.
Niebling John F.
Samsung Electronics Co,. Ltd.
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