Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-02-12
1998-05-05
Bowers, Jr., Charles L.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438699, 438697, 438763, 438626, 438632, H01L 214763
Patent
active
057473811
ABSTRACT:
This invention relates to a method for removing residual spin-on-glass (SOG) during a planarization processing step wherein the SOG is used as a sacrificial planarization medium and subjected to a full etchback to an underlying interlevel dielectric (ILD) layer. The SOG is applied over the ILD layer, and etched back into the ILD layer by reactive-ion-etching under conditions of comparable etch rates for both SOG and ILD. At endpoint there some residual pockets of SOG can be present as well as a region of SOG along the edges of the wafer where it is clamped in the etchback tool. The residual SOG must be removed completely to avoid SOG cracking after thermal processing and SOG outgassing during subsequent metal deposition. For this purpose an aqueous etch consisting of hydrofluoric acid buffered with ammonium fluoride is used. The etchant composition chosen exhibits a selectivity for SOG over the ILD glass of greater than 40 making it suitable for removing considerable SOG residues with minimal attack of the ILD.
REFERENCES:
patent: 5192697 (1993-03-01), Leong
patent: 5328871 (1994-07-01), Tanigawa et al.
patent: 5459105 (1995-10-01), Matsuura
Lee Jin-Yuan
Wu Lin-June
Yu Chen-Hua Douglas
Ackerman Stephen B.
Bowers Jr. Charles L.
Gurley Lynne A.
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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