Method of manufacturing a semiconductor device having...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C427S314000, C118S715000, C118S719000, C118S725000

Reexamination Certificate

active

08053324

ABSTRACT:
In one aspect provides a method of manufacturing a semiconductor device having improved transistor performance. In one aspect, this improvement is achieved by conducting a pre-deposition spacer deposition process wherein a temperature of a bottom region of a furnace is higher than a temperature of in the top region and is maintained for a predetermined period. The pre-deposition temperature is changed to a deposition temperature, wherein a temperature of the bottom region is lower than a temperature of the top region.

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patent: 6235568 (2001-05-01), Murthy et al.
patent: 6849510 (2005-02-01), Lowe et al.
patent: 7173296 (2007-02-01), Bu et al.
patent: 7179745 (2007-02-01), Waite et al.
patent: 2004/0157183 (2004-08-01), Bernhardt et al.
patent: 2005/0191866 (2005-09-01), Powell
patent: 2006/0234455 (2006-10-01), Chen et al.

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