Semiconductor memory devices and methods of manufacturing...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S201000, C438S258000, C438S261000, C438S264000, C438S266000, C257SE21422, C257SE21682

Reexamination Certificate

active

07842570

ABSTRACT:
In methods of manufacturing a memory device, a tunnel insulation layer is formed on a substrate. A floating gate having a substantially uniform thickness is formed on the tunnel insulation layer. A dielectric layer is formed on the floating gate. A control gate is formed on the dielectric layer. A flash memory device including the floating gate may have more uniform operating characteristics.

REFERENCES:
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patent: 6927447 (2005-08-01), Choi et al.
patent: 6933198 (2005-08-01), Chu et al.
patent: 2005/0116279 (2005-06-01), Koh
patent: 10-022403 (1998-01-01), None
patent: 2006-237434 (2006-09-01), None
patent: 1020020050918 (2002-06-01), None
patent: 655289 (2006-12-01), None
patent: 1020060124863 (2006-12-01), None
Korean Notice to Submit Response; Mar. 27, 2008.

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