Method of making a wafer level integration package

Details Method of making a wafer level integration package Method of making a wafer level integration package

2007-06-20

2009-06-30

Le, Dung A. (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S612000, C438S617000, C438S124000, C438S508000

Reexamination Certificate

active

07553752

ABSTRACT:
A semiconductor package is made by providing a wafer having a first electrical contact pad integrated into a top surface of the wafer, forming a through-hole interconnection extending downward from a first surface of the first electrical contact pad, electrically connecting a die to a second surface of the first electrical contact pad, cutting the wafer to form a channel portion and a connecting portion, disposing an encapsulant over the die and the channel portion, backgrinding the wafer to remove the connecting portion and expose a surface of the through-hole interconnection, disposing a second electrical contact pad over the surface of the through-hole interconnection, disposing a dielectric layer along a side surface of the second electrical contact pad, and singulating the wafer into an individual segment containing the die. The dielectric layer is disposed to form a plurality of lands extending across a bottom surface of the semiconductor device.

REFERENCES:
patent: 6958544 (2005-10-01), Sunohara
patent: 2005/0121768 (2005-06-01), Edelstein et al.
patent: 2006/0275946 (2006-12-01), MacNamara et al.

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