Semiconductor integrated circuit, and designing method and...

Details Semiconductor integrated circuit, and designing method and... Semiconductor integrated circuit, and designing method and...

2006-10-25

2009-11-03

Ellis, Kevin L (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S726000

Reexamination Certificate

active

07613972

ABSTRACT:
A semiconductor integrated circuit comprises a combinational circuit section having a combinational circuit, a scan path circuit for inputting and outputting a value from and to the combinational circuit section in accordance with a scan enable signal and in synchronization with a clock signal, and a clock control section for generating and outputting a predetermined number of pulses as the clock signal after a predetermined period has passed since a time when an output command signal was received. The clock control section has an oscillator circuit for generating and outputting the pulse, and is configured to output a last pulse of the predetermined number of pulses in a manner which holds a logical value immediately after an active edge for the scan path circuit.

REFERENCES:
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patent: 6442722 (2002-08-01), Nadeau-Dostie et al.
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patent: WO 00/19343 (2000-04-01), None
Japanese Office Action, with English translation, issued in Japanese Patent Application No. 2005-310178, mailed May 12, 2009.

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