Method of fabricating non-volatile memory

Details Method of fabricating non-volatile memory Method of fabricating non-volatile memory

2007-09-18

2007-09-18

Pert, Evan (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S264000

Reexamination Certificate

active

11187424

ABSTRACT:
In one embodiment, a semiconductor device includes a semiconductor substrate having a first junction region and a second junction region. An insulated floating gate is disposed on the substrate. The floating gate at least partially overlaps the first junction region. An insulated program gate is disposed on the floating gate. The program gate has a curved upper surface. The semiconductor device further includes an insulated erase gate disposed on the substrate and adjacent the floating gate. The erase gate partially overlaps the second junction region.

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Jan Van Houdt, et al. “A Low-Cost Poly-Sidewall Erase HIMOS™ Technology For 130-90nm Embedded Flash Memories” IMEC, Kapeldreef 75, B3001 Leuven, Belgium, 2 pages.

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