Methods of fabricating fin field effect transistors having...

Details Methods of fabricating fin field effect transistors having... Methods of fabricating fin field effect transistors having...

2006-07-04

2006-07-04

Lee, Hsien-Ming (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S212000, C438S268000, C438S279000

Reexamination Certificate

active

07071048

ABSTRACT:
A field effect transistor includes a vertical fin-shaped semiconductor active region having an upper surface and a pair of opposing sidewalls on a substrate, and an insulated gate electrode on the upper surface and opposing sidewalls of the fin-shaped active region. The insulated gate electrode includes a capping gate insulation layer having a thickness sufficient to preclude formation of an inversion-layer channel along the upper surface of the fin-shaped active region when the transistor is disposed in a forward on-state mode of operation. Related fabrication methods are also discussed.

REFERENCES:
patent: 6432829 (2002-08-01), Muller et al.
patent: 6800905 (2004-10-01), Fried et al.
patent: 2004/0235300 (2004-11-01), Mathew et al.
patent: 2004/0262692 (2004-12-01), Hareland et al.
patent: 10-2003-0020644 (2003-03-01), None

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