Static pass transistor logic with transistors with multiple...

Details Static pass transistor logic with transistors with multiple... Static pass transistor logic with transistors with multiple...

2006-01-31

2006-01-31

Coleman, W. David (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S278000

Reexamination Certificate

active

06991988

ABSTRACT:
Static pass transistor logic having transistors with multiple vertical gates are described. Multiple vertical gates are edge defined with only a single transistor being required for multiple logic inputs. Thus a minimal surface area is required for each logic input. The static pass transistor includes a transistor which has a horizontal depletion mode channel region between a single source and drain region. A number of vertical gates are located above different portions of the depletion mode channel region. A vertical gate is located above a first portion of the depletion mode channel region and is separated therefrom by a first insulator material. A vertical gate is located above a second portion of the channel region and is separated therefrom by a second insulator material. There is no source nor drain region associated with each input and the gates have sub-lithographic horizontal dimensions by virtue of being edge defined vertical gates.

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