Method of fabricating flat-cell mask read-only memory devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S278000

Reexamination Certificate

active

06908819

ABSTRACT:
According to embodiments of the invention, a first gate insulating pattern and a mask pattern are sequentially stacked on a semiconductor substrate. Subsequently an impurity region is formed in the semiconductor substrate. Next, the mask pattern is removed to expose the first gate insulating pattern and a second gate insulating layer is formed on the entire surface thereof. The mask pattern is preferably formed of an anti-reflecting pattern and a photoresist pattern that are sequentially stacked. The anti-reflecting pattern is preferably formed of a material layer without etching selectivity with respect to the photoresist pattern. For this, the anti-reflecting pattern is preferably formed of organic materials including hydrocarbonic compounds. In addition, removing a mask pattern is performed with an etch recipe having an etch selectivity with respect to the first gate insulating pattern.

REFERENCES:
patent: 5710067 (1998-01-01), Foote et al.
patent: 6500768 (2002-12-01), Shields et al.
patent: 2002/0173102 (2002-11-01), Lee et al.
patent: 2003/0129794 (2003-07-01), Liu
patent: 1997-0079128 (1997-12-01), None
patent: 2000-13931 (2000-03-01), None
English language of Abstract for Korean Patent Publication No. 2000-13931.
English language of Abstract for Korean Publication No. 1997-0079128.

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