Strained silicon MOSFET having reduced leakage and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S424000

Reexamination Certificate

active

06924182

ABSTRACT:
The formation of shallow trench isolations in a strained silicon MOSFET includes performing ion implantation in the strained silicon layer in the regions to be etched to form the trenches of the shallow trench isolations. The dosage of the implanted ions and the energy of implantation are chosen so as to damage the crystal lattice of the strained silicon throughout the thickness of the strained silicon layer in the shallow trench isolation regions to such a degree that the etch rate of the strained silicon in those regions is increased to approximately the same as or greater than the etch rate of the underlying undamaged silicon germanium. Subsequent etching yields trenches with significantly reduced or eliminated undercutting of the silicon germanium relative to the strained silicon. This in turn substantially prevents the formation of fully depleted silicon on insulator regions under the ends of the gate, thus improving the MOSFET leakage current.

REFERENCES:
patent: 5308785 (1994-05-01), Comfort et al.
patent: 6646322 (2003-11-01), Fitzgerald
patent: 6657223 (2003-12-01), Wang et al.
patent: 6703648 (2004-03-01), Xiang et al.
patent: 6730576 (2004-05-01), Wang et al.
patent: 6831292 (2004-12-01), Currie et al.
patent: 6846720 (2005-01-01), Balasubramanian et al.
patent: 6849527 (2005-02-01), Xiang
patent: 6852600 (2005-02-01), Wang et al.
patent: 2004/0180509 (2004-09-01), Wang et al.
patent: 2005/0032327 (2005-02-01), Ohnishi et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Strained silicon MOSFET having reduced leakage and method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Strained silicon MOSFET having reduced leakage and method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Strained silicon MOSFET having reduced leakage and method of... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3476750

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.