Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-08
2005-03-08
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S321000
Reexamination Certificate
active
06864139
ABSTRACT:
Structures and methods involving non volatile depletion mode p-channel memory cells with an ultrathin tunnel oxide thicknesses, e.g. less than 50 Angstrom (Å), have been provided. Write and erase operations are performed by tunneling. The floating gate of the depletion mode p-channel memory cell is adapted to hold a fixed charge over a limited range of floating gate potentials or electron energies. There is a range potentials applied to the floating gate for which there are no final nor initial states in the silicon substrate or p+ source region. In this range of potentials there can be no charge leakage from the floating gate by tunneling or thermally assisted tunneling. The charge state of the floating gate will modulate the conductivity of the underlying transistor channel, with different stable and non-volatile charge states resulting in different conductivity states. Other aspects are also included.
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Hoang Quoc
Micro)n Technology, Inc.
Nelms David
Schwegman Lundberg Woessner & Kluth P.A.
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