Method to eliminate copper hillocks and to reduce copper stress

Details Method to eliminate copper hillocks and to reduce copper stress Method to eliminate copper hillocks and to reduce copper stress

2002-11-08

2004-10-19

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S653000, C257S751000

Reexamination Certificate

active

06806184

ABSTRACT:

BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method for the creation of layers of copper having improved surface characteristics.
(2) Description of the Prior Art
After or as part of the creation of semiconductor devices, these devices or parts thereof must be interconnected. For these interconnections, metal such as aluminum or their alloys or copper are the preferred materials. Copper has of late been the material of choice in view of the more attractive performance characteristics of copper such as a low cost and low resistivity. Copper however has a relatively large diffusion coefficient into surrounding dielectrics such as silicon dioxide and silicon. Copper from an interconnect may diffuse into the silicon dioxide layer causing the dielectric to become conductive and decreasing the dielectric strength of the silicon dioxide layer. Copper interconnects should therefore be encapsulated by at least one diffusion barrier to prevent diffusion into the silicon dioxide layer. Silicon nitride is a diffusion barrier to copper, but the prior art teaches that the interconnects should not lie on a silicon nitride layer because it has a high dielectric constant compared with silicon dioxide. The high dielectric constant causes an undesired increase in capacitance between the interconnect and the substrate. Copper further has low adhesive strength to various insulating layers, while it has been proven inherently difficult to mask and etch a blanket copper layer into intricate circuit structures.
The deposition and processing of a layer of semiconductor material typically creates a thin film of material in which molecular stress in introduced due to the thermal processing of the deposited layer. This thermal stress results in the accumulation of sub-layers of the material, which show themselves as hillocks over the surface of the created thin film. This occurrence of surface hillocks is particularly troublesome where multiple overlying layers of copper are used as part of the structure since lower layer hillocks will have a magnifying effect on overlying layers of copper. The film stress is typically attributed to a mismatch of the Coefficient of Thermal Expansion (CTE) over adjacent layers of material, a mismatch that is more pronounced where one of the overlying layers of material comprises metal.
In view of the negative effects that can be introduced by surface hillocks, where these hillocks occur on the surface of patterned copper, a method of reducing or eliminating such hillocks is of benefit in processing semiconductor devices that use copper as an interconnect medium. The invention addresses concerns of hillock formation and provides a method whereby such a formation of hillocks of avoided.
U.S. Pat. No. 6,368,948 B1 (Ngo et al.) shows a process to reduce copper hillocks.
U.S. Pat. No. 4,704,367 (Alvis et al.) reveals a process to suppress hillocks using an Ar ion implant and thermal cycles.
U.S. Pat. No. 6,348,410 B1 (Ngo et al.) shows a low temperature copper hillock suppression process.
U.S. Pat. No. 5,447,887 (Fliplak et al.) shows a capping copper process.
SUMMARY OF THE INVENTION
A principle objective of the invention is to create copper interconnects that are free of surface hillocks.
Another objective of the invention is to create a layer of copper interconnect whereby the layer has reduced stress therein.
Yet another objective of the invention is to create copper interconnect metal of increased reliability.
In accordance with the objectives of the invention a new method is provided for the creation of copper interconnects. An opening is created in a layer of dielectric, a layer of barrier material is deposited. The layer of barrier material extends over the surface of the layer of dielectric. A film of copper is deposited over the surface of the layer of barrier material. The copper film is polished down to the surface of the layer of barrier material, creating a first copper interconnect. The created first copper interconnect is subjected to a thermal anneal, inducing copper hillocks in the surface of the first copper interconnect by releasing copper film stress in the first copper interconnect. The copper hillocks are then removed by polishing the surface of the created first copper interconnect down to the surface of the surrounding layer of dielectric, creating a second and final copper interconnect.


REFERENCES:
patent: 562712 (1896-06-01), Liu et al.
patent: 4704367 (1987-11-01), Alvis et al.
patent: 5447887 (1995-09-01), Filipiak et al.
patent: 6348410 (2002-02-01), Ngo et al.
patent: 6368948 (2002-04-01), Ngo et al.
patent: 6465284 (2002-10-01), Adachi et al.
patent: 6500754 (2002-12-01), Erb et al.
patent: 457683 (2001-10-01), None

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