Integrated circuit device and fabrication using metal-doped...

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Plasma

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S084000, C438S085000, C438S102000, C438S104000, C438S393000, C438S798000

Reexamination Certificate

active

06709958

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to integrated circuit memory devices, and in particular to the metal doping of chalcogenide materials in the fabrication of chalcogenide memory elements and integrated circuit devices containing such memory elements.
BACKGROUND OF THE INVENTION
Electrically programmable and erasable materials, i.e., materials that can be electrically switched between a generally resistive state and a generally conductive state are well known in the art. Chalcogenide materials are one class of examples of such materials finding use in the semiconductor industry, particularly in the fabrication of non-volatile memory devices.
Chalcogenide materials are compounds made of one or more chalcogens and one or more elements that are more electropositive than the chalcogens. Chalcogens are the Group VIB elements of the traditional IUPAC version of the periodic table, i.e., oxygen (O), sulfur (S), selenium (Se), tellurium (Te) and polonium (Po). The more electropositive elements are generally selected from Groups IVB and VB. Typical combinations for non-volatile memory devices include selenium and/or tellurium with germanium (Ge) and/or antimony (Sb). However, other combinations are also known, such as combinations of arsenic (As) and sulfur.
To obtain the desired electrical characteristics, chalcogenide materials are often doped with metal, such as copper (Cu), silver (Ag), gold (Au) or aluminum (Al).
FIGS. 1A-1D
depict the fabrication of a simple chalcogenide memory element
100
. The basic structure of a chalcogenide memory element includes a first electrode, a second electrode and a chalcogenide material interposed between the first and second electrodes. Additional detail of chalcogenide memory devices, as well as examples of variations on the basic structure of a chalcogenide memory element, are given in U.S. Pat. No. 5,998,244 issued Dec. 7, 1999 to Wolstenholme et al., U.S. Pat. No. 5,920,788 issued Jul. 6, 1999 to Reinberg, and U.S. Pat. No. 5,837,564 issued Nov. 17, 1998 to Sandhu et al., each of which is commonly assigned with the assignee of the present disclosure. In general, chalcogenide memory elements are formed on a semiconductor wafer or other substrate as a portion of an integrated circuit device.
Chalcogenide memory elements typically store a single bit, e.g., a low resistivity (high conductivity) corresponding to a first logic state and a high resistivity (low conductivity) corresponding to a second logic state. Differing levels of resistivity of the chalcogenide memory elements are sensed using current sensing techniques well known in the art while applying a read potential of less than the threshold potential.
Chalcogenide memory elements can be electrically switched between conductivity states by applying varying electrical fields to the doped chalcogenide material. By applying a programming potential above some threshold potential, the metal dopant atoms are believed to align in a dendritic structure, thereby forming conductive channels and decreasing the resistivity of the chalcogenide material. This transition is reversible by applying a potential having an opposite polarity. A range of applied potentials having a magnitude of less than the threshold potential, i.e., read potentials, can be applied without altering the resistivity of the doped chalcogenide materials. These read potentials can be applied to the chalcogenide memory elements for sensing the resistivity of the doped chalcogenide material and, thus, the memory elements' data values.
Unlike dynamic random access memory (DRAM) devices, a non-volatile memory device does not require a periodic refresh to maintain its programmed state. Instead, non-volatile memory devices can be disconnected from a power source for extended periods of time, often measured in years, without the loss of the information stored in its memory cells. Chalcogenide materials best suited for use in non-volatile memory devices will thus tend to maintain their degree of resistivity indefinitely if an applied voltage does not exceed the threshold potential.
In
FIG. 1A
, a first electrode
110
is formed and a chalcogenide layer
115
is formed overlying the first electrode
110
. As noted previously, electrical characteristics of chalcogenide layer
115
may be improved through doping of the chalcogenide material with metal. This is typically carried out through a process known as photo-doping where diffusion of metal atoms is photon induced. In this process, a metal layer
120
is first formed on the chalcogenide layer
115
as shown in FIG.
1
A. The metal layer
120
typically contains the copper, silver, gold, aluminum or other high-diffusing metal. Formation of the first electrode
110
and/or the metal layer
120
is typically performed in a vacuum chamber, e.g., using a vacuum sputtering process.
To continue the photo-doping process in
FIG. 1B
, electromagnetic radiation
125
is directed at the metal layer
120
, resulting in diffusion of metal atoms from the metal layer
120
into the chalcogenide layer
115
. The electromagnetic radiation
125
is generally ultraviolet (UV) light. Driving metal atoms into the chalcogenide layer
115
results in a doped chalcogenide layer
130
containing the chalcogenide material and the diffused metal. The semiconductor wafer must generally be removed from the vacuum chamber to expose the wafer surface to the UV light source.
The photo-doping process is generally carried out until the metal layer
120
is completely diffused into the doped chalcogenide layer
130
as shown in FIG.
1
C. The thickness of the metal layer
120
should be chosen such that the desired doping level can be attained in the doped chalcogenide layer
130
. However, the metal layer
120
must be thin enough, e.g., hundreds of angstroms, to allow transmission of the electromagnetic radiation
125
in order to produce the desired photon-induced diffusion of metal. As shown in
FIG. 1D
, a second electrode
150
is then formed overlying the doped chalcogenide layer
130
and any remaining portion of the metal layer
120
to produce chalcogenide memory element
100
. As with the first electrode
110
and/or the chalcogenide layer
115
, formation of the second electrode
150
is also typically performed in a vacuum chamber. The second electrode
150
is preferably a material having a different work function (&PHgr;
m
) than the first electrode
110
. The work function is a measure of the energy required to remove an electron from a material's surface.
There are several disadvantages to the traditional photo-doping process. The process can be time consuming as the semiconductor wafers are moved in and out of a vacuum chamber during the various processing stages described above. This movement of the semiconductor wafers among various process equipment also increases the chance of contamination or other damage during transport. Also, because the metal layer must be thin for efficient photon-induced diffusion of metal, the desired doping level may not be efficiently attainable with a single photo-doping process as the necessary thickness of the metal layer may result in excessive reflection of the electromagnetic radiation.
For the reasons stated above, and for other reasons stated below that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative methods for producing chalcogenide memory elements.
SUMMARY
Methods are described herein for forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers. The methods include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conduct

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Integrated circuit device and fabrication using metal-doped... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit device and fabrication using metal-doped..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit device and fabrication using metal-doped... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3266548

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.