Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-05-08
2003-11-25
Coleman, William David (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S798000
Reexamination Certificate
active
06653180
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of electronics, and more particularly to methods of forming electronic devices including transistors and related structures.
BACKGROUND OF THE INVENTION
As semiconductor devices become more highly integrated, sizes of MOS transistors and distances between source and drain regions generally decrease. Accordingly, gate dielectric films may become more thin to improve control of channel by a gate electrode and to improve operation characteristics of a transistor.
However, as gate dielectric films become thinner, it may be difficult to provide reliability of gate dielectric films. To address this problem, technology for implanting nitrogen into a silicon dioxide layer forming a gate dielectric film has been developed. As an example, U.S. Pat. No. 5,596,218 to Soleimani et al. entitled “Hot Carrier-Hard Gate Oxides by Nitrogen Implantation Before Gate Oxidation” discloses technology for implanting a high concentration of nitrogen atoms at the interface between a silicon substrate and a gate oxide film.
When using an oxide film containing nitrogen as a gate dielectric film, a portion in which dangling bonds between the oxide film and a silicon substrate can be strengthened by a nitrogen atom, thereby improving interface characteristics between a gate dielectric film and a silicon substrate. Also, by virtue of the nitrogen component in the gate dielectric film, penetration of boron from an n
+
polysilicon gate electrode into the gate dielectric film can be reduced, and therefore various benefits including suppression of shifting of a threshold voltage level in a PMOS transistor can be expected.
However, in a CMOS transistor where an n-channel metal oxide semiconductor field transistor (MOSFET) and a p-channel MOSFET are coupled, a gate dielectric film containing nitrogen may differently affect performance characteristics and I
D
-V
GS
characteristics in a subthreshold region in each of the n-channel MOS (NMOS) device and the p-channel MOS (PMOS) device.
The performance characteristics and the subthreshold characteristics of each of the NMOS transistor and the PMOS transistor comprising gate dielectric films including nitrogen may thus need to be evaluated to form a gate dielectric film capable of providing desired operational characteristics in the NMOS and the PMOS transistors based on the result of the above evaluation.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide methods of forming transistors having improved performance and reliability and related structures.
It is another object of the present invention to provide methods that can allow improved transistors of different conductivity types to be fabricated on a common substrate.
These and other objects can be provided according to the present invention by forming first and second field effect transistors on a substrate. More particularly, the first field effect transistor can include a first gate dielectric layer having a first nitrogen concentration, and the second field effect transistor can include a second gate dielectric layer having a second nitrogen concentration lower than the first nitrogen concentration. The different nitrogen concentrations in the respective dielectric layers can allow improved performance and reliability for transistors of different conductivity types on a common substrate.
For example, the first field effect transistor can define a channel of a first conductivity type, and the second field effect transistor can define a channel of a second conductivity type to provide a complementary metal oxide semiconductor (CMOS) device. More particularly, the first conductivity type can be p-type so that the first transistor can be a PMOS transistor, and the second conductivity type can be n-type so that the second transistor can be an NMOS transistor.
In addition, the steps of forming the first and second transistors can be preceded by the step of forming a nitrogen region having an increased nitrogen concentration along a first surface portion of the substrate and the step of forming the first transistor can include forming the first gate dielectric layer adjacent the nitrogen region. In addition, the second surface portion of the substrate can be maintained free of the nitrogen region, and the step of forming the second transistor can include forming the second gate dielectric layer adjacent the second surface portion of the substrate free of the nitrogen region. Nitrogen from the nitrogen region can thus diffuse into the first gate dielectric layer to provide the higher nitrogen concentration for the first gate dielectric layer.
The step of forming the nitrogen region can include forming a sacrificial layer on the first surface portion of the substrate, and forming a mask layer on a second surface portion of the substrate wherein the mask layer exposes the sacrificial layer on the first surface portion of the substrate. Nitrogen can then be introduced into the first surface portion of the substrate through the sacrificial layer while the nitrogen is blocked from the second surface portion of the substrate by the mask layer. After introducing the nitrogen, the sacrificial layer and the mask layer can be removed. More particularly, the nitrogen can be introduced by implanting nitrogen ions.
According to the present invention, an NMOS transistor of a CMOS device can include a gate dielectric layer having a relatively low concentration of nitrogen, and a PMOS transistor of the CMOS device can include a relatively high concentration of nitrogen. The relatively low concentration of nitrogen in the NMOS transistor gate dielectric layer can strengthen interface characteristics between the NMOS gate dielectric layer and the substrate without significantly affecting the operational characteristics of the NMOS transistor. The relatively high concentration of nitrogen in the PMOS transistor gate dielectric layer can increase the reliability of the PMOS gate dielectric layer.
REFERENCES:
patent: 5596218 (1997-01-01), Soleimani et al.
patent: 5726087 (1998-03-01), Tseng et al.
patent: 5861347 (1999-01-01), Maiti et al.
patent: 5920779 (1999-07-01), Sun et al.
patent: 6048769 (2000-04-01), Chau
patent: 6087236 (2000-07-01), Chau et al.
patent: 6005796 (1994-01-01), None
T. Kuroi et al., Nove NICE (Nitrogen Implantation into CMOS Gate Electrode and Source-Drain) Structure for High Reliablity and HIgh Performance 0.25 um Dual Gate CMOS, IEEE, Dec. 1993, pp. 325-328.
Coleman William David
Myers Bigel & Sibley & Sajovec
Samsung Electronics Co,. Ltd.
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