Source/drain strained layers

Details Source/drain strained layers Source/drain strained layers

2011-07-05

2011-07-05

Ho, Tu-Tu V (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

With lattice constant mismatch

C257S018000, C257S629000, C257S369000, C257S408000, C257SE29193

Reexamination Certificate

active

07973337

ABSTRACT:
A semiconductor device and method of manufacture thereof wherein a PMOS source/drain region of a transistor within the substrate includes a first strained layer in the PMOS source/drain region and a first capping layer in contact with the first strained layer. Further, the semiconductor device and method provide for an NMOS source/drain region of a transistor within the substrate including a second strained layer in the NMOS source/drain region and a second capping layer in contact with the second strained layer.

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