Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Diffusing a dopant
Reexamination Certificate
1999-08-30
2001-10-09
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Diffusing a dopant
C438S560000, C438S563000, C438S151000, C438S535000, C438S565000, C438S478000, C427S526000
Reexamination Certificate
active
06300228
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates, in general, to semiconductor device fabrication and, more particularly, to doping processes in the fabrication of semiconductor devices.
BACKGROUND OF THE INVENTION
Semiconductor device fabrication processes typically include the introduction of dopants into a semiconductor substrate to form device junctions in the semiconductor substrate. Because of its superior controllability and processing throughput, ion implantation is one of the most widely used processes for introducing dopants into the semiconductor substrate. An ion implantation process typically includes depositing a photoresist on the semiconductor substrate, exposing the photoresist using a mask, developing the photoresist to produce the desired lithographic pattern, and implanting ions into the semiconductor substrate through the photoresist pattern.
A semiconductor device fabrication process usually includes several doping processes. The photoresist masks in different ion implantation processes should align with each other. In state of art semiconductor devices, the tolerance for the misalignment between different photoresist masks is very small, typically less than 0.1 micrometer. Accurately aligning photoresist masks with each other is complicated and time consuming. Further, the ion implantation processes are unsuitable for forming shallow junctions, e.g., junctions having depths less than 100 nanometers, and high dopant density which are often essential for submicron semiconductor devices to achieve high performances in terms of contact resistance, sheet resistance, and junction leakage current.
Accordingly, it would be advantageous to have a doping process capable of forming multiple doped regions accurately aligned with each other in a semiconductor substrate. It is desirable if the doping process can be performed without the complicated inefficient steps of depositing, developing, and stripping photoresist. It is also desirable for the doping process to be capable of forming shallow junctions with high dopant densities in the semiconductor substrate. It would be of further advantage for the doping process to be compatible with the fabrication of high performance submicron semiconductor devices.
SUMMARY OF THE INVENTION
A general object of-the present invention is to provide a doping process suitable for fabricating high performance submicron semiconductor devices. It is a further object of the present invention to provide the doping process capable of forming multiple doped regions in a semiconductor substrate with high alignment accuracy. Another object of the present invention is to perform the doping process without depositing and developing photoresist. It is an additional object of the present invention for the doping process to be capable of forming shallow junctions in the semiconductor substrate.
These and other objects of the present invention are accomplished through a multiple precipitation doping process. The multiple precipitation doping process includes precipitating different dopants onto corresponding portions of the major surface of the semiconductor substrate. Preferably, patterned laser beams are used to precipitate the dopants onto the major surface of the semiconductor substrate, thereby eliminating the need for photoresist masks in the doping process. The patterned laser beams determine the patterns and the alignments of the doped regions. The precipitation rate and duration determine the surface dopant concentration and junction depths in the semiconductor substrate.
In a preferred embodiment, the multiple precipitation process of the present invention includes steps of forming an amorphous region partially extending into a single crystal semiconductor substrate; precipitating different dopants onto corresponding portions of the major surface of the semiconductor substrate overlying the amorphous region; and annealing the amorphous region. The annealing process melts the amorphous region and allows the dopants precipitated on the semiconductor major surface to diffuse into the semiconductor substrate. Preferably, the temperature and the duration of the annealing process are adjusted so that the dopant diffusions stop at the interface between amorphous region and the underlying single crystal region. The annealing process also crystallizes the semiconductor material in the amorphous region. Therefore, the semiconductor substrate becomes a single crystal semiconductor substrate with multiple doped regions therein. The depth of the doped regions is substantially equal to the depth of the amorphous region before annealing. The depth of the amorphous region determines the junction depth of the doped regions.
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Adkisson James W.
Bruce James A.
Ellis-Monaghan John J.
Mann Randy W.
Nowak Edward J.
International Business Machines - Corporation
Keshavan B. V.
Sabo William D.
Schmeiser Olsen & Watts
Smith Matthew
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