Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers
Patent
1998-01-12
1999-02-16
Bowers, Charles
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Multiple layers
438762, 438769, 438787, 438791, 438738, 438695, H01L 2170
Patent
active
058720634
ABSTRACT:
A self-aligned structure and method of etching contact holes in the self-aligned structure are described. The dielectric materials, etching methods, and etchants are chosen to provide high selectivity etching. The structure comprises an electrode with a silicon oxy-nitride cap and silicon oxy-nitride spacers on the sidewalls of the electrode and the cap. An etch stop layer of silicon nitride is deposited over the substrate covering the spacers and cap. A layer of silicon oxide is deposited over the etch stop layer. Etching methods and etchants are used which provide a ratio of the etching rate of silicon oxide to the etching rate of silicon nitride or silicon oxy-nitride of at least eight and a ratio of the etching rate of silicon nitride to the etching rate of silicon oxy-nitride of at least two.
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Chao Li-Chih
Huang Yuan-Chang
Lee Jin-Yuan
Liaw Jhon-Jhy
Ackerman Stephen B.
Bowers Charles
Nguyen Thanh
Prescott Larry J.
Saile George O.
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