Formation of a cylindrical polysilicon module in dram technology

Details Formation of a cylindrical polysilicon module in dram technology Formation of a cylindrical polysilicon module in dram technology

1997-01-28

1998-05-19

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438631, H01L 218242

Patent

active

057535477

ABSTRACT:
The present invention provides a method of manufacturing a stacked cylindrical capacitor having a smooth top cylindrical surface and uniform height. A first insulating layer 20 is formed over the substrate 10. A barrier layer 22 having an opening 23 is formed over a first insulating layer 20 on a substrate. A second insulating layer 24 composed of silicon oxide is formed on the barrier layer 22. The second insulating layer 24 and the first insulating layer 20 are patterned forming a first cylindrical opening 26 exposing the active region of the substrate 10 and forming a second cylindrical opening 30 in the second insulating layer 24 that exposes portions of the barrier layer 22. A conformal polysilicon layer 34 is formed over the resultant surface and the walls of the cylindrical openings 26 30. A planarizing layer 36 is formed over the resulting surface and then etched back forming a planarizing plug 36A that partially fills the second cylindrical opening 30A. A third insulation layer 40 is formed over resultant surface. The third insulating layer 40 and the polysilicon layer 34 are isotropically etched back forming a cylindrical bottom electrode 44 with a smooth top surface 44A. The smooth top electrode surface 44A increases the breakdown voltage to the capacitor.

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patent: 5516719 (1996-05-01), Ryou
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