Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1999-09-17

2000-11-28

Dinh, Son T.

Static information storage and retrieval

Read/write circuit

Precharge

365207, G11C 700

Patent

active

061544027

ABSTRACT:
In a semiconductor memory device, charge transfer gates and a bit line precharging/equalizing circuit are inserted in the order mentioned in a bit line pair between memory cells and a sense amplifier. When the transfer gates are off, data of the memory cells are read out to the bit line pair located on the memory cell side. Subsequently, when the transfer gates are turned on, the data are transferred to the bit line pair located on the sense amplifier side. Thereafter, the transfer gates are turned off on the basis of a threshold value of the transfer gates. Then, the memory cell data transferred to the sense amplifier side are amplified by a conventional DRAM method. The bit line precharging/equalizing circuit does not require a large area. It is therefore possible to miniaturize the semiconductor memory device.

REFERENCES:
patent: 5469395 (1995-11-01), Kuwabara et al.
patent: 5689461 (1997-11-01), Kaneko et al.
patent: 5703814 (1997-12-01), Nishimura et al.
patent: 5995431 (1999-11-01), Inui et al.
patent: 6031779 (2000-02-01), Takahashi et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1732299