Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-06-03
2000-03-14
Wilczewski, Mary
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438254, 438396, 438397, 438634, 438638, 438740, H01L 218242
Patent
active
060372133
ABSTRACT:
A method for making cylinder-shaped stacked capacitors for DRAMs is described. A planar first insulating layer is formed over device areas. An etch-stop layer, a second insulating layer, and a polish-back endpoint detect layer are deposited in which cylinder-shaped capacitors with node contacts are formed. First openings for node contacts are etched in the polish-back and second insulating layers to the etch-stop layer aligned over the device areas. Wider second openings, aligned over the first openings, are etched through the polish-back layer, and also removes the etch-stop layer in the first openings. The second insulating layer in the second openings is etched to the etch-stop layer, while the first insulating layer is etched in the first openings for node contact openings. A doped first polysilicon layer is deposited and polished back to the polish-back detect layer to form concurrently the node contacts in the first openings and bottom electrodes in the second openings. The second insulating layer is removed by a wet etch. A thin dielectric layer is deposited, and top electrodes are formed from a second polysilicon layer. The etch-stop layer provides better control of the etching depth for the first and second openings that improves reliability while providing a simple manufacturing process.
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Lee Yu-Hua
Shih Cheng-Yeh
Wu Cheng-Ming
Ackerman Stephen B.
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
Thomas Toniae M.
Wilczewski Mary
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