Write signal input buffer for a semiconductor memory device

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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36518901, G11C 700

Patent

active

054187460

ABSTRACT:
The present invention relates to a write signal input buffer, among input buffers of semiconductor memory device, for receiving a write enable signal supplied from the exterior of chip. The present invention provides a write signal input buffer at least having an input stage for receiving a write enable signal supplied from the exterior of chip, logic means for generating a write drive signal as a correspondence signal according to an output signal of the input stage, and a latch portion for latching an output signal of the logic means and including switching means controlled by a drive signal of data output stage circuit on its latch path. Accordingly, normal driving operation is carried out according to input of external write enable signal regardless of the ground noise induced in data output operation, thereby guaranteeing a correct write operation of chip. Operational characteristics related to timing can be improved when the chip is mounted in the system since stable and accurate driving in write operation is obtained. Also, the reliability of semiconductor integrated circuit related to write operation can be improved.

REFERENCES:
patent: 4794567 (1988-12-01), Akatsuka
patent: 5278789 (1994-01-01), Inoue et al.
patent: 5305271 (1994-04-01), Watanabe
patent: 5323346 (1994-06-01), Takahashi

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