Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-01-23
2007-01-23
Coleman, W. David (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S584000
Reexamination Certificate
active
10932955
ABSTRACT:
Structures and methods for write once read only memory employing floating gates are provided. The write once read only memory cell includes a floating gate transistor formed in a modified dynamic random access memory (DRAM) fabrication process. The floating gate transistor has a first source/drain region, a second source/drain region, a channel region between the first and the second source/drain regions, a large work function floating gate separated from the channel region by a gate insulator, and a control gate is separated from the floating gate by a gate dielectric. A plug is coupled to the first source/drain region and couples the first source/drain region to an array plate. A transmission line is coupled to the second source/drain region. The floating gate transistor can be programmed in two directions to trap charge in the high work function floating gate.
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Coleman W. David
Schwegman Lundberg Woessner & Kluth P.A.
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