Write-drive data controller

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365190, 365233, 307451, 307475, G11C 700, G11C 1134

Patent

active

047633034

ABSTRACT:
A write drive data control circuit for controlling the transmission of data to a memory array includes data input means for receiving complimentary data signals which are then transmitted to output circuits. The valid data is latched and the input circuits disabled. The output circuits remain enabled so as to pass the latched data to the memory array. After a predetermined period of time, the output circuits are disabled. In this manner, both the data set up time and data hold time may be independently optimized.

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patent: 4635234 (1987-01-01), Yamaguchi
patent: 4682048 (1987-07-01), Ishimoto
patent: 4707809 (1987-11-01), Ando

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