Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2010-06-01
2011-12-13
Gaffin, Jeffrey A (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S731000, C714S726000
Reexamination Certificate
active
08078927
ABSTRACT:
In a first embodiment a TAP318of IEEE standard 1149.1 is allowed to commandeer control from a WSP202of IEEE standard P1500 such that the P1500 architecture, normally controlled by the WSP, is rendered controllable by the TAP. In a second embodiment (1) the TAP and WSP based architectures are merged together such that the sharing of the previously described architectural elements are possible, and (2) the TAP and WSP test interfaces are merged into a single optimized test interface that is operable to perform all operations of each separate test interface.
REFERENCES:
patent: 7404129 (2008-07-01), Whetsel
patent: 7877658 (2011-01-01), Whetsel
Bassuk Lawrence J.
Brady W. James
Gaffin Jeffrey A
Merant Guerrier
Telecky , Jr. Frederick J.
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