Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
2008-01-09
2010-06-01
Chu, Chris C (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257SE23019, C257S723000, C257S773000, C257S781000, C370S360000, C370S388000, C370S411000, C438S612000
Reexamination Certificate
active
07728444
ABSTRACT:
A difference in delay of signal transmission due to the wiring within a board is minimized. A wiring board includes wiring for connecting terminals included in one of a plurality of semiconductor chips to terminals included in another one of the plurality of semiconductor chips, through branch points. Each of the plurality of semiconductor chips includes first and second terminals. Moreover, a first wiring up to the first terminals and a second wiring up to the second terminals are in a positional relationship of being shifted parallel to each other in a planar direction of the wiring board so as not to come into electrical contact with each other. In each of the first and second wirings, a wire is provided between a connection point for the terminal in a first one of the semiconductor chips and a position of a root, a complete binary tree structure in which all leaves are at the same depth from the root is formed, connection points for the terminals in the rest of the semiconductor chips are positioned at the respective leaves, and the paths of wires respectively corresponding to branches at the same depth in the tree structure include vias and the lengths of the paths of wires including the lengths of the vias are equal to each other.
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Chu Chris C
McGinn IP Law Group PLLC
NEC Electronics Corporation
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