Wafer level package and method of fabricating the same

Details Wafer level package and method of fabricating the same Wafer level package and method of fabricating the same

2009-07-07

2010-12-07

Zarneke, David A (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

C257S774000, C257SE23168

Reexamination Certificate

active

07847416

ABSTRACT:
Wafer level packages and methods of fabricating the same are provided. In one embodiment, one of the methods comprises forming semiconductor chips having a connection pad on a wafer, patterning a bottom surface of the wafer to form a trench under the connection pad, patterning a bottom surface of the trench to form a via hole exposing the bottom surface of the connection pad, and forming a connecting device connected to the connection pad through the via hole. The invention provides a wafer level package having reduced thickness, lower fabrication costs, and increased reliability compared to conventional packages.

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