Wafer having smooth surface

Details Wafer having smooth surface Wafer having smooth surface

1999-12-31

2001-08-28

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Multiple layers

C438S758000, C438S761000

Reexamination Certificate

active

06281139

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates to creating a wafer for use in a diode device and, more particularly, to an apparatus and method for preparing a wafer having smooth areas on a wafer surface.
BACKGROUND OF THE INVENTION
Wafers are used in a variety of applications, including diode and integrated circuit devices. Wafers may be comprised of different materials. Known applications may use wafers made of silicon, or the like. For silicon wafers, the silicon crystal is grown to create the wafer. Silicon is included in the wafer because of its desirable electrical properties.
As silicon is grown via crystals holes appear on the surface of the wafer. The holes may be known as polishing local defects (“PLD”). PLDs may have the shape of a hole with a diameter and a depth varying between 1 to 10 micrometers. PLDs may be induced during polishing, however, the center of the PLDs are created by dislocations in the crystal lattice during the growing of the silicon crystal on the wafer.
In most known applications, it may be acceptable to have a wafer surface smooth down to 10 Angstroms. Thus, the majority of the area on the wafer surface is smooth, while the remaining surface includes holes. For example, the average number of holes per square centimeter may be 1 in the center of the wafer and about 10 near the edges of the wafer. Known methods and applications, however, have been inadequate in reducing the number of holes per square centimeter on the wafers for sub-atomic applications. Wafer surfaces that are used in piezo-electric devices, such as sandwiches having a cathode and an anode, may exhibit detrimental affects due to PLDs. A PLD may result in a short circuit between electrodes in diode applications.
Silicon crystals having almost no PLDs are grown in orbit to overcome the gravitation influence on the crystal growing process. The orbit growing process, however, is expensive and time-consuming. Further, access to orbit growing device platforms is prohibitive.
SUMMARY OF THE INVENTION
Thus, a need has arisen for preparing a wafer having a smooth surface. A method and apparatus for preparing a wafer is provided that substantially eliminates and reduces the disadvantages and problems associated with conventional methods. Elementary particles have wave properties, and corpuscular properties. Related U.S. patent application Nos. 09/020,654 to Tavkhelidze, herein incorporated by reference, and 09/045,299 to Cox et al, herein incorporated by reference, describe that wave interference is possible under certain conditions.
In an embodiment of the present invention, a method for preparing a wafer having a smooth surface is provided that substantially eliminates and reduces the disadvantages and problems associated with conventional methods. The present invention describes a novel method of preparing a wafer surface. The method includes the step of depositing a first material on a wafer base to form holes and a surface. The method also includes the step of depositing a second material at an angle on the first material such that the second material is only on the surface. The method also includes the step of exposing the first and the second material. The method also includes the step of growing electrochemically a third material on the surface of the second material to enclose the holes.
In a preferred embodiment, the wafer base includes a silicon base. The first material comprises lead. The lead material is deposited on the wafer surface in a known fashion. The second material is deposited on the first material at an angle. The second material comprises silver. The first and second materials are exposed to air. A third material comprising copper is grown on the silver material via electrochemical growth. Thus, in accordance with the present invention, the wafer surface is prepared having an anode with holes exactly in the same places as a cathode such that there is a smooth area that repeats the surfaces of the anode and cathode within a diode device and prevents short circuits.
The technical advantage of the present invention is that a method for preparing a wafer surface is provided that reduces the effect of holes within the wafer surface. Another technical advantage of the present invention is that wafers may be prepared at a reduced cost. Another technical advantage of the present invention is that wafers may be produced more efficiently and timely. Another technical advantage of the present invention is that a wafer is prepared that reduces the occurrences of short circuits in diode device applications.


REFERENCES:
patent: 3602778 (1971-08-01), Mitsuru et al.

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