Wafer burn-in test circuit of a semiconductor memory device

Static information storage and retrieval – Read/write circuit – Testing

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36518911, 36523006, G11C 700

Patent

active

055900798

ABSTRACT:
A wafer burn-in test circuit for sensing a defective cell of a semiconductor memory device having a plurality of memory cells connected to a word line and a row decoder for selecting the word line. The burn-in test includes a word line driver circuit having an input coupled to a row decoding signal generated by the row decoder, and an ouput coupled to the word line, a control circuit having a first input coupled to a burn-in voltage signal, and a second input coupled to a control signal, and an electrical line connected between the word line driver circuit and the control circuit. In a normal mode of operation, the word line driver circuit is responsive to the row decoding signal for raising the word line to an enable voltage level. In a burn-in test mode of operation, the control circuit is responsive to the control signal for applying a burn-in voltage to the word line via the electrical line and the word line driver circuit.

REFERENCES:
patent: 5363333 (1994-11-01), Tsujimoto
patent: 5381373 (1995-01-01), Ohsawa
patent: 5452253 (1995-09-01), Choi
Furuyama, Tohru et al., Wafer Burn-in (WBI) Technology for RAM's, Toshiba Corp & Toshiba Microelectronics Corp, No month available 1993 IEEE, IEDM 93-639--IEDM 93-642.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Wafer burn-in test circuit of a semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Wafer burn-in test circuit of a semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wafer burn-in test circuit of a semiconductor memory device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1146891

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.