Voltage boosting circuit having dual precharge circuits in semic

Details Voltage boosting circuit having dual precharge circuits in semic Voltage boosting circuit having dual precharge circuits in semic

1996-12-19

1998-12-15

Nelms, David

Static information storage and retrieval

Read/write circuit

Precharge

36518909, G11C 700

Patent

active

058503633

ABSTRACT:
A voltage boosting circuit for a semiconductor memory device provides good set-up characteristics and reduces excessive voltage levels by utilizing a first precharge circuit during a first time interval after power is applied and second precharge circuit during a second time interval. The circuit includes a voltage boosting means having an output terminal for outputting a boosted voltage signal. The first precharge circuit is coupled between an internal power supply and the output terminal and includes a diode connected transistor. The second precharge circuit is coupled between an external power supply and the output terminal and includes a plurality of diode connected transistors connected in series. During the first time interval, the voltages of the internal and external power supplies are equal and the first precharge circuit, which has a relatively low turn-on voltage, precharges the output line, thereby providing good set-up characteristics. During the second and subsequent time intervals, the voltage of the external power supply is greater than the voltage of the internal power supply and the second precharge circuit, which has a relatively high turn-on voltage, precharges the output line to provide good set-up characteristics, but prevents the voltage level of the output line from becoming excessive, thereby enhancing the reliability of the gate oxide layer of a transistor that is coupled to the output line.

REFERENCES:
patent: 5428576 (1995-06-01), Furuyama
patent: 5642313 (1997-06-01), Ferris

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